Dutch semiconductor equipment giant ASML is formulating a long-term strategy to extend its business footprint from the extreme ultraviolet (EUV) lithography domain into the advanced packaging and chip bonding equipment markets. In an interview, ASML Chief Technology Officer Marco Pieters explicitly stated: "We are not only looking at the next five years, but focusing on the next ten, even fifteen years. We are analyzing the potential directions the industry may take and what technological support will be required for packaging, bonding, and other related processes."
As AI chip architectures become increasingly complex, chip design is undergoing a fundamental transformation from "planar" structures to multi-layer stacked "skyscraper" configurations. Previously, chips designed by companies such as Nvidia and AMD were predominantly single-layer planar structures. Today, chips integrate multiple specialized dies vertically through nanoscale interconnect technologies, forming heterogeneous integration systems.
The primary driver behind this transformation is the "memory wall" challenge—the insatiable data appetite of AI models has made data transfer speed a critical performance bottleneck. By directly stacking memory chips atop or adjacent to processors, data movement distances are minimized, resulting in substantial improvements in bandwidth and computational power. Technologies such as TSMC's CoWoS and Intel's Foveros exemplify this trend.
ASML's entry will reshape the competitive dynamics of the advanced packaging equipment market. Currently, industry titans including Applied Materials, Tokyo Electron, and KLA have established strong positions through years of dedicated focus. Applied Materials has strengthened its panel-level packaging capabilities through the acquisition of Tango Systems, leveraging its advantages in chemical mechanical planarization (CMP) equipment. Tokyo Electron has invested 47 billion yen to establish an advanced packaging equipment R&D center in Kyushu. Meanwhile, Korean equipment manufacturers have secured leading positions in the HBM bonding equipment segment.
Notably, ASML does not intend to become a general-purpose equipment supplier, but rather to concentrate on critical nodes where extreme precision is paramount. Pieters emphasized: "This business will develop in parallel with the areas we have cultivated over the past 40 years." The company plans to extend its accumulated expertise in optics and wafer processing from front-end lithography to interconnect and bonding processes in the packaging domain.
Beyond advanced packaging, ASML is also exploring possibilities to break through current lithography size limitations. Presently, chip exposure areas are constrained by "postage stamp-sized" field of view ranges, which restrict chip operating speeds. The company is investigating whether maximum exposure dimensions can be expanded to further enhance production efficiency.
This strategic transformation carries profound implications for ASML's business model. The company's current forward price-to-earnings ratio stands at approximately 40 times, significantly higher than Nvidia's 22 times. By entering the high-value advanced packaging equipment market, ASML aims to reduce its reliance on single-product EUV equipment sales and establish a dual-track growth structure where "advanced processes are driven by EUV, while mature processes and advanced packaging are supported by DUV," thereby providing new momentum for achieving future revenue targets.
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